Job Description
Job Description
We are hiring experienced Memory Layout Engineers (3–18 yrs) with expertise in ARM architectures and advanced nodes (7nm, 5nm, 2nm). The ideal candidate brings a strong foundation in memory compilers, general memory concepts, and hands-on physical design on lower process technologies.
\nLocation: Bangalore & Hyderabad
\n⏱️ Notice Period: 0–15 Days (Immediate joiners preferred)
\nTo Apply: Send your updated CV to janagaradha.n@acldigital.com
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