Job Description
Job Description
SmartSOC, A Virtusa Company
\nLocation: Bengaluru / Hyderabad
\nExperience: 3–10 Years
\nRole Overview
\nSmartSOC is looking for EMIR / Power Integrity Engineers with strong hands-on experience in EM/IR analysis, RedHawk-SC, and Power Grid (PG) design/specification. The role involves analyzing EMIR issues, driving convergence, and working closely with Physical Design teams to achieve full-chip/block-level signoff.
\nKey Responsibilities
\n- \n
- Perform EM/IR analysis and signoff for complex SoC/ASIC designs using RedHawk-SC. \n
- Analyze Static/Dynamic IR Drop, Electromigration, and current-density violations. \n
- Perform root-cause analysis of EMIR violations and identify appropriate corrective actions. \n
- Validate PnR databases, PG connectivity, power structures, and EMIR inputs. \n
- Drive EMIR convergence in collaboration with Physical Design teams. \n
- Provide ECO recommendations for PG strengthening, via optimization, placement/routing changes, and other design fixes. \n
- Define, review, and validate Power Grid (PG) specifications based on design power and reliability requirements. \n
- Correlate EMIR issues with placement, routing, power, and timing to identify root causes. \n
- Support block and full-chip EMIR signoff closure. \n
- Work closely with Physical Design, STA, Power, and Physical Verification teams throughout signoff. \n
Must-Have Skills
\n- \n
- 3–10 years of relevant experience in EMIR / Power Integrity / ASIC signoff. \n
- Strong hands-on experience in EMIR analysis and convergence. \n
- RedHawk-SC experience is mandatory. \n
- Strong understanding of IR Drop, Electromigration, current density, and power integrity. \n
- Experience in PG Grid specification, analysis, and validation. \n
- Hands-on experience with EMIR debugging and signoff closure. \n
- Ability to provide effective ECO guidance to PnR teams. \n
- Good understanding of ASIC Physical Design and signoff flows. \n
Good to Have
\n- \n
- Basic understanding of STA concepts. \n
- Exposure to DRC/LVS and Physical Verification. \n
- Experience with Multi-Voltage / Multi-Power-Domain designs. \n
- Knowledge of UPF/CPF. \n
- Scripting experience in Tcl / Python / Perl / Shell. \n
Ideal Candidate
\nAn engineer who can independently run RedHawk-SC EMIR simulations, debug violations, identify root causes, recommend PG/PnR fixes, and drive EMIR issues to signoff closure.